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Marvell Analog Layout Senior Staff Engineer 
Italy, Lombardy 
841323179

Yesterday

What You Can Expect

The hardware application engineering position focuses on resolving customer issues on their HW/platform, customer design enablement, bring-up, and manufacture production. The candidate should have strong working knowledge of the major computer industry standards such as PCIe Express, Ethernet, and miscellaneous interface.

  • Debug L1 ethernet issues related to Serdes and MAC/PHY (analyze Signal Strength, Serdes Eye, Review & Tune SI parameters etc.).

  • Debug other interfaces on board such as PCIE, i2C, MDIO etc.

  • Perform Schematics and Layout reviews of the customer design / platform and provide feedback.

  • Interact with HW designers (board and ASIC) and write Hardware Design guidelines, Application Notes and publish Technical Bulletins.

  • Interface with board designers, ASIC /Serdes controller designers, program management, board vendors and component vendors to fully comprehend the board design parameters.

  • Generate PCB stack up recommendations that comprehend the full capabilities of industry available board fabrication materials and technologies.

  • Communicate effectively with customers considering both strategic and tactical aspects of the solution & work with internal cross-functional teams to deliver optimal solutions.

Basic Qualifications

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience.

  • Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.

  • Must possess excellent written and verbal communication skills.  Be able to present and clearly articulate solutions to customers.

  • Previous experience of working as an Application Engineer or any equivalent Customer interacting role (i.e. ability to handle customers) is a must.

  • Expertise in High Speed Ethernet Serdes interfaces : NRZ, PAM-4 100G.

  • Expertise in Ethernet Physical layer (Layer 1) - Serdes, MAC, PCS including debugging L1 issues for Interop.

  • Strong background in Signal Integrity, Power Integrity, Electromagnetics, Thermal, Multi-lane cross talk analysis and RF applications related to IC Package and PCB Design are required.

  • Experience in using tools: HyperLynx, Ansoft SIWave and HFSS, ADS, Sigrity, PowerSI and PowerDC, Cadence Allegro, and Polar stack up.

  • Able to perform Schematics & Layout reviews effectively.

  • At least one of the following scripting languages: Python / Perl / Unix shell.

Preferred Qualifcations

  • Expertise in MATLAB and Python a plus.

  • Ability to handle Equipment: Servers (Windows / Linux), Scopes, Traffic generators (Ixia/Spirent/Xena), environmental chambers, Thermal Heads, Keysight VNA/TDR.

  • Ability to program High speed / optics modules and link up with various modules: LR, SR, ZR, ZR4, AECs etc.

Expected Base Pay Range (USD)

121,400 - 181,800, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.


Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at