Nvidia Senior Power Performance Characterization Engineer 

Israel, North District 

547061450

As a power & performance characterization engineer, you will be responsible for power measurements of networking ASICs in a multi-component system and correlate the power consumption to VLSI/timing principles, set operational conditions (operating F-V curve, temperature range), and characterize power to performance tradeoffs. Your role involves analyzing discrepancies, refining test methodologies, and defining the post-silicon power model of networking ASICs and how it is affected by the power model of the other components in the systems. You will work closely with design, test, and characterization teams to develop and implement robust test strategies that improve product quality and yield and close tasks quickly within a short period!

• Running functional and structural tests on the system and correlating power/ performance parameters to parametric data from ATE (production).

• Analyzing effects ofsilicon/environmentalconsiderations on key parameters. Candidates will build the relevant DOEs, write required scripts/functions/ envelopes, debug HW and SW issues during the activity, and analyze results from the IC point of view.

• Write tests (in python/C++) to test the ASIC in worst-case conditions.

• We require candidates to understand hardware specifications, the effect of the system board on IC performance considerations, software components that enable the desired functionality, and a variety of network protocols (e.g. Ethernet, PCIe).

• You will collaborate with hardware teams to understand high-level hardware design, focusing primarily on interaction with the IC and taking part in debugging software issues arising from hardware-software integration.

• B.Sc. in electrical engineering.

• Experience of 5+ years with component debugging, ASIC performance and power characterization.

• Knowledge in python/C/C++

• Strong understanding of board-IC interactions.

• Experience with writing software for hardware interaction

• Proficiency in HW/SW debug techniques and tools.

• Have Knowledge in IC timing physics/ considerations.

• Experience with network protocols such as Ethernet, TCP/IP, and related communication standards

• Experience with system-level component debug

• Experience in writing SW for HW testing.