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Cisco ASIC Technical Design Lead Engineer Armenia, Yerevan 47318532
11.06.2025
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Responsibilities:
- Participate and contribute to chip sensors architecture definition and discussions.
- Generate and verify different configurations of sensor to ASIC chip
- Implement testbenches, run simulation and verification
- Help define, evolve, and support sensor integration in block and chip level.
- Collaborate with physical design and front end teams close design timing and place-and-route issues
- Triage, debug, and root cause simulation, software bring-up, and customer failures.
- BS/MS in Electrical Engineering or Computer Science
- 10+ years of experience in ASIC design
- Excellent Verilog/System Verilog programming skills.
- Knowledge of Silicon Lifetime Managements IP, their usage, verification specs
- Experience with simulators/synthesis/static timing constraints and tools
- Good understanding of verification methodologies and flow
- Strong interactive and waveform debug skills.
- Excellent English verbal and written communication skills.
- Self-motivated, able to work independently or as a team player
- Experience in block level synthesis, place and route, timing closure is ideal.
- Scripting experience (Python, Perl, TCL, shell programming) highly valuable.
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