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Google Design Verification Engineer III Multimedia Silicon India, Karnataka, Bengaluru 203687955
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- 4 years of experience verifying digital logic at RTL using SystemVerilog for ASICs.
- Experience verifying digital systems using standard IP components/interconnects (microprocessor cores or hierarchical memory subsystems).
- Experience with object-oriented programming.
Preferred qualifications:
- Master's or PhD degree in Electrical Engineering or Computer Science.
- Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.
- Experience creating and using verification components and environments in a standard verification methodology (e.g., UVM).
- Experience with image processing or other multimedia IPs, such as display or video codec.
- Experience with ASIC components, standard interfaces, performance verification, and memory system architecture.
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