Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with Central Processing Unit (CPU ) implementation, assembly language, or compute System on a Chip (SOC).
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Master’s degree in Electrical Engineering or Computer Science.
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).