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Google CPU Cache Subsystem Design Manager United States, California, Mountain View 976565393
Today
Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in CPU memory subsystem design.
- 10 years of experience in high-performance CPU, cache subsystem or AI accelerator logic/RTL design including microarchitecture definition and PPA optimizations.
- 6 years of experience leading and managing teams for modern processor subsystems with high speed, and lower power design.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, or related field, or equivalent practical experience.
- Experience with front-end quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, UPF, and Low Power Optimization/Estimation).
- Experience with mobile CPU subsystem and SoC architecture/integration.
- Experience with ARM Instruction Set Architecture.
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