Amazon DFT Verification Engineer Graviton Server 

Israel, Tel Aviv District 

520647911

The ML Apps team works side by side with chip architects, compiler engineers and runtime engineers to create , build and tune distributed training solutions with Trn1. Experience training these large models using Python is a must. FSDP, Deepspeed and other distributed training libraries are central to this and extending all of this for the Neuron based system is key.Key job responsibilities
In this position you will have a unique opportunity to take part in the upcoming verification training program, where you will learn the industry cutting edge verification methods from our technical experts and team leaders:
SystemVerilog & UVM
SystemC and Arch Modeling
Emulation and System Level verification
Formal and Assertion based verificationA day in the life
Our offices are located in Sarona/Tel Aviv and Matam/Haifa.
One of our main products is the Graviton ARM based server.
If you are interested in hearing more, you are welcome to watch the following videos:
Graviton3 presented during AWS re:Invent conference:
AWS re:Invent 2021 – Keynote with Peter DeSantis (around minute 37)There is also in depth session about AWS Graviton:
AWS re:Invent 2022 - AWS Graviton deep dive: The best price performance for AWS workloads
AWS re:Invent 2022 - Silicon innovation at AWSDiverse Experiences
AWS values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.
Mentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.Work/Life Balance

- BSc degree in Computer/Electrical Engineering from leading universities.
- 3+ years of experience in Chip Design/ DFT/ Design Verification

- Verilog, System Verilog
- UVM methodology
- Scripting skills