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Google Staff CPU RTL Design Engineer Taiwan, New Taipei 262827976
10.04.2025
Minimum qualifications:
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience in CPU or AI accelerator logic/RTL design, including microarchitecture definition and PPA optimizations.
- Experience with RTL language (System Verilog) and related design processes (e.g., Lint, UPF).
Preferred qualifications:
- PhD in Electrical Engineering or Computer Science.
- Experience leading front-end design for modern processor components or AI accelerators.
- Experience with SoC design, architect, and integration.
- Experience with ARM Instruction Set Architecture.
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