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Cpu Pre-silicon Engineering Program Manager jobs at Apple in United States, Beaverton
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United States
State
Beaverton
31 jobs found
08.06.2025
A
Apple CPU Implementation Engineer United States, Oregon, Beaverton
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Description:Full job details
Minimum BS and 10+ years of relevant industry experience. Experience in logic design and digital circuits. Experience with low power and high frequency design techniques. Experience in TCL or Perl....
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08.06.2025
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Apple CPU Cache Microarchitect/RTL Engineer United States, Oregon, Beaverton
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Description:Full job details
Minimum BS and 10+ years of relevant industry experience. Experience with microprocessor cache design or coherent system cache design. Experience with Verilog and/or VHDL. Knowledge of microprocessor architecture. Experience with...
07.06.2025
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Apple CPU Debug Power Management Microarchitect/RTL Engineer United States, Oregon, Beaverton
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Description:Full job details
Minimum BS and 10+ years of relevant industry experience. Experience with Verilog or VHDL. Experience with simulators and waveform debugging tools. Experience with logic design with timing and power implications....
07.06.2025
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Apple SoC Silicon Debug Engineering Program Manager United States, Oregon, Beaverton
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SOC / VLSI Chip Design, Post Silicon Validation or Product Engineering experience. Post-silicon debug experience. Relevant technical program management, technical leadership or vendor management experience. BS and 3+ years relevant...
07.06.2025
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Apple CPU Debug Power Management Verification Engineer United States, Oregon, Beaverton
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Description:Full job details
Minimum BS and 10+ years of relevant industry experience. Programming skills in Perl/Python or SystemVerilog. Experience in processor or power management architecture and verification. Experience with system fabric protocols such...
07.06.2025
A
Apple CPU Cache Microarchitect/RTL Engineer United States, Oregon, Beaverton
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Description:Full job details
Minimum BS and 3+ years of relevant industry experience. Experience with microprocessor cache design or coherent system cache design. Experience with Verilog and/or VHDL. Knowledge of microprocessor architecture. Experience with...
06.06.2025
A
Apple CPU Debug Power Management Microarchitect/RTL Engineer United States, Oregon, Beaverton
Share
Description:Full job details
Minimum BS and 3+ years of relevant industry experience. Experience with Verilog or VHDL. Experience with simulators and waveform debugging tools. Experience with logic design with timing and power implications....
Share
Description:Full job details
Minimum BS and 10+ years of relevant industry experience. Experience in logic design and digital circuits. Experience with low power and high frequency design techniques. Experience in TCL or Perl....
These jobs might be a good fit
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